JPH0622989Y2 - 電子部品用パッケージ - Google Patents
電子部品用パッケージInfo
- Publication number
- JPH0622989Y2 JPH0622989Y2 JP6385488U JP6385488U JPH0622989Y2 JP H0622989 Y2 JPH0622989 Y2 JP H0622989Y2 JP 6385488 U JP6385488 U JP 6385488U JP 6385488 U JP6385488 U JP 6385488U JP H0622989 Y2 JPH0622989 Y2 JP H0622989Y2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- package
- cavity
- mark
- step portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004020 conductor Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6385488U JPH0622989Y2 (ja) | 1988-05-13 | 1988-05-13 | 電子部品用パッケージ |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6385488U JPH0622989Y2 (ja) | 1988-05-13 | 1988-05-13 | 電子部品用パッケージ |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01167042U JPH01167042U (en]) | 1989-11-22 |
JPH0622989Y2 true JPH0622989Y2 (ja) | 1994-06-15 |
Family
ID=31289342
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6385488U Expired - Lifetime JPH0622989Y2 (ja) | 1988-05-13 | 1988-05-13 | 電子部品用パッケージ |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0622989Y2 (en]) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6089481B2 (ja) * | 2012-07-30 | 2017-03-08 | セイコーエプソン株式会社 | 電子部品の製造方法および電子モジュールの製造方法 |
JP2023037262A (ja) * | 2021-09-03 | 2023-03-15 | 富士電機株式会社 | 半導体装置及び半導体装置の製造方法 |
-
1988
- 1988-05-13 JP JP6385488U patent/JPH0622989Y2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH01167042U (en]) | 1989-11-22 |
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